A. TAHRI, A. DRAOU

*Applied Power Electronics Laboratory, Department of Electrotechnics,
**University** of **Sciences** and Technology of **Oran**, BP 1505 El Mnaouar (31000 **Oran**), **Algeria**, Fax: +213–41421581 *

**Keywords**

PWM, Multilevel inverter, Cascaded, NPC, Harmonics

Recently the multilevel pulse width modulation (PWM) converter topology has drawn tremendous interest in the power industry since it can easily provide the high power required for high power applications for such uses as static VAR compensation, active power filters, and so that large motors can also be controlled by high power adjustable frequency drives Ref. [1,2].

The multilevel voltage source inverters unique structure allows them to reach high voltages with low harmonics without the use of transformers or series connected synchronized switching devices, a benefit that many contributors have been trying to appropriate for high voltage, high power applications.

The general structure of the multilevel converter which has a multiple of the usual six switches found in a three-phase inverter is to synthesize a sinusoidal voltage from several levels of voltages, typically obtained from capacitor voltage sources Ref. [3]. The main motivation for such converters is that current is shared among these multiple switches, allowing a high converter power rating than the individual switch VA rating would otherwise allow with low harmonics. As the number of levels increases, the synthesized output waveform, a staircase wave like, approaches a desired waveform with decreasing harmonic distortion, approaching zero as the number of levels increases Ref. [4,6].

There are roughly three main types of transform less multilevel inverter topologies, which have been studied and received considerable interest from high power inverter system manufacturers: the flying capacitor inverter, the diode clamped inverter and the cascaded H-bridge inverter in Ref. [5,9]. The detailed overview and comparison of characteristics, and their implementation issues are given in our chapter in Ref. [10]. All share the same property, which is that the output filter can be dramatically reduced, and the usual bandwidth limit induced by the switching frequency can be reconsidered.

Among these inverter topologies, the flying capacitor inverter is difficult to be realized because each capacitor must be charged with different voltages as the voltage level increases Ref. [7].

Moreover, the clamped inverter, also known as a neutral clamped converter in Ref. [1] is difficult to be expanded to multilevel because of the natural problem of the DC link voltage unbalancing. It consists of two capacitor voltages in series and uses the centre tap as the neutral. Each phase leg of the three level converters has two pairs of switching devices in series. The centre of each device pair is clamped to the neutral through clamping diodes. The waveform obtained from the three level converters is a quasi-square wave output.

Though the cascaded has the disadvantage to need separate dc sources, the modularised circuit layout and package are possible and the problem of the dc link voltage unbalancing does not occur, thus easily expanded to multilevel. Due to these advantages, the cascaded inverter bridge has been widely applied to such applications as HVDC, SVC, stabilizer, high power motor drive and so on. This topology of inverter is suitable for high voltage and high power inversion because to its ability to synthesize waveforms with better harmonic spectrum and low switching frequency Ref. [9].

This paper will investigate several control techniques
applied to the multilevel cascaded inverter in order to ensure an efficient
voltage utilization and better harmonic spectrum [8]. Computer simulation
results with MatLab will be presented and discussed together with a comparative
study of the different control techniques Ref. [11].**
**

Moreover, the mathematical model of a 7 level single phase multilevel cascaded inverter is carried out using the well know mathematical model of the single phase full bridge inverter. A laboratory experimental prototype of 3 kW has been designed and constructed and tested. Some experimental results are also included in this paper for completeness.

** **

** **

**Modelling of the Multilevel Cascaded Inverter**

Figure 1 represents the structure of a three phase cascaded type converter with separate DC sources, it shows an example of an 11 level cascaded inverter composed of five full bridge inverters connected in series on each phase.. This type of converter does not need any transformer nor clamping diodes nor flying capacitors, each bridge converter generate three levels of voltages: E, 0, and –E, for a three phase configuration the cascaded converters can be connected in star or delta.

It has the advantages of using fewer components and having a simple control since the converters present the same structure.

And just for completeness Fig. 2 is added which shows the power circuit of a 7 level cascaded inverter composed of three full bridge inverters connected in series on each phase.

For each full bridge inverter the output voltage is given by [5] :

_{} (1)

And the input dc current is:

_{} (2)

*where:*

·
*i =1…5* (number of
full bridge inverters employed) for the 11 level cascaded type and

*i =1…3* (number of full bridge inverters
employed) for the 7 level type.

·
*I _{a}* is
the output current of the cascaded inverter.

·
*S _{1i }and S_{2i} *are the upper switch of each full bridge inverter.

Now the output voltage of each phase of the multilevel cascaded inverter is given by:

_{} (3)

*Figure 1. Power circuit of 11 level cascaded inverter*

*Figure 2. Power circuit of a 7 level single phase cascaded inverter*

**Control Techniques Used For the Multilevel Cascaded
Inverter**

** **

*Control strategies for the 11-th level inverter
topology*

* Shift PWM technique*

This technique uses a number of wave carriers equal to the number of full bridge inverters employed in the cascaded inverter structure shifted by 1/(5.fc), where 1/fc is the period of carrier reference [4].

In this technique the frequency modulation index is always multiple
of three to have a symmetry in the output voltages. Fig. 3 shows The SPWM
technique for the 11-th level cascaded inverter and the output voltage is
depicted in Fig. 4. Fig. 5 shows the output voltage spectrum of the 11-th level
cascaded inverter for different frequency modulation index *m _{f}*.

In three phase system the frequency modulation index is defined as:

_{}, with *m _{f} =3, 6, 9, …. * (4)

*Figure 3. 11 level cascaded inverter shift*

* *

*Figure 4. Line to neutral output voltage PWM for m _{f} =3 of
11 level technique cascaded inverter*

*Figure 5. Output voltage spectrum of 11 level cascaded inverter for
m _{f} =3, 6, 9, 12*

*Sinusoidal Natural PWM (SNPWM) technique*

Sinusoidal pulse width modulation is one of the primitive technique which was expanded to the multilevel (here 11 level) cascaded inverter as shown in Fig. 6.

*Figure 6. References and carriers*

Fig. 7 shows the output voltage with SNPWM technique for *m _{f}=3*
and

*Figure 7. Line to neutral output voltage waveforms*

Fig. 8 shows that for the same *m _{f}*, the output
voltage spectrum of SPWM technique is better than that of SNPWM technique. The
SNPWM can be used for very high power application which needs low stress on
power devices as IGBTs.

*Figure 8. Output voltage spectrum of both PWM technique for m _{f}
= 3.*

*Programmed PWM technique *

Programmed PWM technique allows the elimination of selected number of harmonics. This method is used because it optimises a particular objective function such as to obtain minimum losses, reduced torque pulsations, selective elimination harmonics, and therefore is the most effective means of obtaining high performance results.

With the equal amplitude of all dc sources, the expression of the amplitude of the fundamental and all harmonics contents are given by:

_{}, for odd *n* * *(5)

_{}, for even *n *(6)

where Vdc is
the dc voltage supply, and m is the number of dc source and a* _{k}* is the optimized harmonic switching angles.

The low-order surplus harmonics must be eliminated; therefore equation (5) shows that m-1 odd harmonics and m-1 non triplen odd harmonics can be eliminated. The parameters of the programmed PWM can be found by the resolution of the set of nonlinear equations given by equations (5) and (6).

Table.1 gives the switching angles of the programmed PWM for different modulation index (MI).

*Table 1. Switching angles*

MI |
α |
α |
α |
Α |
α |

0.5 |
36.68 |
50.19 |
65.39 |
82.69 |
91.25 |

0.6 |
35.34 |
46.95 |
58.57 |
72.61 |
87.83 |

0.7 |
34.37 |
44.62 |
54.14 |
65.37 |
77.91 |

0.8 |
22.34 |
39.27 |
52.68 |
59.31 |
70.96 |

Fig. 9 shows the output voltage with Programmed PWM technique for MI = 0.5, and fig. 10 illustrates the output line to line voltage spectrum for the same MI for the 11 level inverter.

This control technique of multilevel cascaded inverter gives good performances and the output voltage spectrum is better when the number of full bridge inverter used increases.

*Figure 9. Line to neutral output voltage*

* *

*Figure 10. Output voltage spectrum*

*Control strategy for the7 level inverter topology *

The PWM technique which control the single phase cascaded inverter employs a number of wave carriers equal to the number of full bridge inverters used in this cascaded topology structure.

In this PWM technique so-called Shift PWM, the carriers signal are shifted by 1/(3.fc), where 1/fc is the period of carrier reference [4], [5].

The parameters of SPWM technique are defined as amplitude modulation
index *m _{a}* and the frequency ratio

_{}, _{} (7)

where *A _{m}*
is the peak to peak amplitude of the reference or modulation waveform and

Figure 11 shows the SPWM technique for 7 level cascaded inverter for
*m _{a }= 0.8* and

*Figure 11. SPWM
Technique for a 7 level cascaded inverter*

* *

Fig. 12 shows the output voltage of each full bridge inverter and the
output voltage of the multilevel inverter for *m _{a} = 0.8* and

*Figure 12. Output voltages of a 7 level single phase cascaded
inverter*

** **

** **

**Simulation and Experimental Results**

To verify the modelling and analysis of the control techniques used for the multilevel cascaded inverter, a 3 kW prototype of a 7 level single phase cascaded inverter was built in laboratory as pictured in Fig. 13.

Fig. 14, 15 and 16 show the output voltage of each full bridge
inverter of the 7 level single phase multilevel cascaded inverter prototype for
*m _{a} = 1* and

Fig. 18 and 19 show the output voltage of the 7 level multilevel
cascaded inverter for *m _{a} = 1* and

*Figure
13. Experimental prototype of a 7 level single phase cascaded inverter*

** **

*Figure 14. Output voltage of the first full bridge inverter for m _{a}
= 1 and m_{f} = 2*

*Figure 15. Output voltage of the second full bridge inverter; m _{a}
= 1, m_{f} = 2*

*Figure 16. Output
voltage of the third full bridge inverter for m _{a} = 1 and m_{f}
= 2*

*Figure 17. Output voltage of the 7 level single phase cascaded
inverter; m _{a} = 1, m_{f} = 2*

** **

*Figure 18. Output voltage of the 7 level single phase cascaded
inverter; m _{a} = 1, m_{f} = 6*

*Figure 19. Output voltage of the 7 level single phase cascaded
inverter; m _{a} = 1, m_{f} = 12*

** **

** **

**Conclusions**

It has investigated the performance of various techniques in terms of output voltage spectrum. It is possible to obtain a satisfactory spectral performance with relatively low switching frequency. It has been shown that the SNPWM technique gives poor output voltage spectrum than the SPWM technique, but the programmed PWM is the best one for many applications that need high dynamic performance in high power application. Moreover, comparative simulation analysis between the different multilevel cascaded inverter control techniques is provided.

It has also investigated the modelling and control of a 7 level single phase multilevel cascaded inverter. Finally, experimental results on a small prototype are reported to prove the effectiveness of this topology of inverter.

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